[−][src]Function core::arch::mips64::__msa_mulv_h
pub unsafe fn __msa_mulv_h(a: v8i16, b: v8i16) -> v8i16
This is supported on MIPS-64 and target feature
msa
only.Vector Multiply
The integer elements in vector a
(eight signed 16-bit integer numbers)
are multiplied by integer elements in vector b
(eight signed 16-bit integer numbers).
The result is written to vector (eight signed 16-bit integer numbers).
The most significant half of the multiplication result is discarded.