[−][src]Function core::arch::mips64::__msa_mulv_b
pub unsafe fn __msa_mulv_b(a: v16i8, b: v16i8) -> v16i8
This is supported on MIPS-64 and target feature
msa
only.Vector Multiply
The integer elements in vector a
(sixteen signed 8-bit integer numbers)
are multiplied by integer elements in vector b
(sixteen signed 8-bit integer numbers).
The result is written to vector (sixteen signed 8-bit integer numbers).
The most significant half of the multiplication result is discarded.