[−][src]Function core::arch::mips64::__msa_ilvr_h
pub unsafe fn __msa_ilvr_h(a: v8i16, b: v8i16) -> v8i16
This is supported on MIPS-64 and target feature
msa only.Vector Interleave Right
The right half elements in vectors a (eight signed 16-bit integer numbers)
and vector b (eight signed 16-bit integer numbers) are copied to the result
(eight signed 16-bit integer numbers)
alternating one element from a with one element from b.