[−][src]Function core::arch::mips64::__msa_fsub_w

pub unsafe fn __msa_fsub_w(a: v4f32, b: v4f32) -> v4f32

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS-64 and target feature msa only.

Vector Floating-Point Subtraction

The floating-point elements in vector b (four 32-bit floating point numbers) are subtracted from the floating-point elements in vector a (four 32-bit floating point numbers). The result is written to vector (four 32-bit floating point numbers).