[−][src]Function core::arch::mips64::__msa_fsor_d
pub unsafe fn __msa_fsor_d(a: v2f64, b: v2f64) -> v2i64
This is supported on MIPS-64 and target feature
msa
only.Vector Floating-Point Signaling Compare Ordered
Set all bits to 1 in vector (two signed 64-bit integer numbers) elements
if the corresponding a
(two 64-bit floating point numbers) and
b
(two 64-bit floating point numbers) elements are ordered,
i.e. both elements are not NaN values, otherwise set all bits to 0.