[−][src]Function core::arch::mips64::__msa_fmul_w
pub unsafe fn __msa_fmul_w(a: v4f32, b: v4f32) -> v4f32
This is supported on MIPS-64 and target feature
msa
only.Vector Floating-Point Multiplication
The floating-point elements in vector a
(four 32-bit floating point numbers) are
multiplied by floating-point elements in vector b
(four 32-bit floating point numbers).