[−][src]Function core::arch::mips64::__msa_fmul_d
pub unsafe fn __msa_fmul_d(a: v2f64, b: v2f64) -> v2f64
This is supported on MIPS-64 and target feature
msa
only.Vector Floating-Point Multiplication
The floating-point elements in vector a
(two 64-bit floating point numbers) are
multiplied by floating-point elements in vector b
(two 64-bit floating point numbers).