[−][src]Function core::arch::mips::__msa_fsub_d

pub unsafe fn __msa_fsub_d(a: v2f64, b: v2f64) -> v2f64

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS and target feature msa only.

Vector Floating-Point Subtraction

The floating-point elements in vector b (two 64-bit floating point numbers) are subtracted from the floating-point elements in vector a (two 64-bit floating point numbers). The result is written to vector (two 64-bit floating point numbers).