[−][src]Function core::arch::mips::__msa_fcor_w
pub unsafe fn __msa_fcor_w(a: v4f32, b: v4f32) -> v4i32
This is supported on MIPS and target feature
msa
only.Vector Floating-Point Quiet Compare Ordered
Set all bits to 1 in vector (four signed 32-bit integer numbers)
elements if the corresponding a
(four 32-bit floating point numbers) and
b
(four 32-bit floating point numbers) elements are ordered, i.e. both elements are not NaN values,
otherwise set all bits to 0.