[−][src]Function core::arch::mips::__msa_fceq_w
pub unsafe fn __msa_fceq_w(a: v4f32, b: v4f32) -> v4i32
This is supported on MIPS and target feature
msa
only.Vector Floating-Point Quiet Compare Equal
Set all bits to 1 in vector (four signed 32-bit integer numbers)
elements if the corresponding in a
(four 32-bit floating point numbers)
and b
(four 32-bit floating point numbers) elements are ordered and equal,
otherwise set all bits to 0.